Non-volatile semiconductor memory devices, such as removable storage cards or Universal Serial Bus (USB) flash memory devices, have enabled increased portability of data and software applications. Data storage densities of non-volatile semiconductor memory devices are generally increasing and support greater performance in portable electronic devices. Some features that enable higher density data storage, such as multi-level cell technologies, may also cause increased design complexity to maintain robust operation of the memory device.
Error detection and correction techniques are becoming more powerful to increase reliability of data retrieved from a memory device. For example, Bose-Chaudhuri-Hocquenghem (BCH) and Reed-Solomon (RS) encoders can detect and correct large numbers of errors using a technique largely based upon division in the finite Galois field GF(2k). Such division operations are conventionally based on long polynomial division and have a variety of applications, such as communications, optical disks, flash memories, portable equipment, and control and computer systems. However, conventional long polynomial division techniques may be limited by high latency. Another division technique with reduced latency has been proposed by use of large lookup tables corresponding to a predetermined divisor. However, such lookup tables impose additional design constraints and limit overall applicability to the specific data stored in the lookup tables.